Refoctoring of README.
This commit is contained in:
parent
8a8da3ec39
commit
98c842bed4
17
README.md
17
README.md
|
|
@ -7,9 +7,10 @@
|
||||||
## Summary
|
## Summary
|
||||||
|
|
||||||
1. [Aims and challenges](#aims-and-challenges)
|
1. [Aims and challenges](#aims-and-challenges)
|
||||||
2. [Architecture choices](#architecture-choices)
|
2. [Design](#design)
|
||||||
3. [Design](#design)
|
1. [Core architecture](#core-architecture)
|
||||||
1. [The instruction set.](#the-instruction-set)
|
2. [Registers and memory map](#registers-and-memory-map)
|
||||||
|
3. [The instruction set](#the-instruction-set)
|
||||||
|
|
||||||
## Aims and challenges
|
## Aims and challenges
|
||||||
|
|
||||||
|
|
@ -36,11 +37,6 @@ People in the 70s got someone on the moon with their brain, and made him come ba
|
||||||
AI is useful for medicine, protein research or other deep research subjects.
|
AI is useful for medicine, protein research or other deep research subjects.
|
||||||
I do not need a LLM to understand and make a computer.
|
I do not need a LLM to understand and make a computer.
|
||||||
|
|
||||||
## Architecture choices
|
|
||||||
|
|
||||||
The computer will be in 8 bits since the RAM and ROM are meant to be in 8 bits.
|
|
||||||
The CPU will have ports for inputs / outputs, not a north and south bridge.
|
|
||||||
|
|
||||||
## Design
|
## Design
|
||||||
|
|
||||||
The design is inspired of great people hard work :
|
The design is inspired of great people hard work :
|
||||||
|
|
@ -49,12 +45,15 @@ The design is inspired of great people hard work :
|
||||||
|
|
||||||
The core architecture will be inspired of the legendary [Intel's MCS-51](/Documents/Datasheets/8051.PDF) [microcontroller series](https://en.wikipedia.org/wiki/Intel_MCS-51).
|
The core architecture will be inspired of the legendary [Intel's MCS-51](/Documents/Datasheets/8051.PDF) [microcontroller series](https://en.wikipedia.org/wiki/Intel_MCS-51).
|
||||||
|
|
||||||
|
The computer will be in 8 bits. The target frequency of the processor is 10mHz
|
||||||
|
The CPU will have ports for inputs / outputs, not a north and south bridge.
|
||||||
|
|
||||||
### Core architecture
|
### Core architecture
|
||||||
|
|
||||||

|

|
||||||
Made with [Drawio](https://app.diagrams.net/).
|
Made with [Drawio](https://app.diagrams.net/).
|
||||||
|
|
||||||
### Registers
|
### Registers and memory map.
|
||||||
|
|
||||||
| Name | Long Name | Description |
|
| Name | Long Name | Description |
|
||||||
| :--: | :---------------------- | :--------------------------- |
|
| :--: | :---------------------- | :--------------------------- |
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue