diff --git a/Simulation/Components/RAM.dig b/Simulation/Components/RAM.dig
new file mode 100644
index 0000000..c644033
--- /dev/null
+++ b/Simulation/Components/RAM.dig
@@ -0,0 +1,349 @@
+
+
+ 2
+
+
+ romContent
+
+
+
+
+
+ Width
+ 6
+
+
+
+
+ RAMSinglePortSel
+
+
+ AddrBits
+ 15
+
+
+ Label
+ UM61256BK
+
+
+ Bits
+ 8
+
+
+
+
+
+ In
+
+
+ Label
+ MAR
+
+
+ Bits
+ 8
+
+
+
+
+
+ In
+
+
+ Label
+ SP
+
+
+ Bits
+ 8
+
+
+
+
+
+ Out
+
+
+ Label
+ D
+
+
+ Bits
+ 8
+
+
+
+
+
+ Splitter
+
+
+ mirror
+ true
+
+
+ Input Splitting
+ 8,7
+
+
+ Output Splitting
+ 15
+
+
+
+
+
+ Splitter
+
+
+ Input Splitting
+ 7,8
+
+
+ Output Splitting
+ 15
+
+
+
+
+
+ PullDown
+
+
+ rotation
+
+
+
+ Bits
+ 7
+
+
+
+
+
+ PullDown
+
+
+ rotation
+
+
+
+ Bits
+ 7
+
+
+
+
+
+ Driver
+
+
+ Bits
+ 15
+
+
+
+
+
+ In
+
+
+ Label
+ MAR/SP
+
+
+
+
+
+ In
+
+
+ Label
+ CLK
+
+
+
+
+
+ Out
+
+
+ Label
+ A
+
+
+ Bits
+ 15
+
+
+
+
+
+ In
+
+
+ Label
+ W
+
+
+
+
+
+ In
+
+
+ Label
+ O
+
+
+
+
+
+ DriverInvSel
+
+
+ Bits
+ 15
+
+
+ flipSelPos
+ true
+
+
+
+
+
+ Or
+
+
+ wideShape
+ true
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/Simulation/Components/Register.dig b/Simulation/Components/Register.dig
new file mode 100644
index 0000000..bdecbb2
--- /dev/null
+++ b/Simulation/Components/Register.dig
@@ -0,0 +1,173 @@
+
+
+ 2
+
+
+ romContent
+
+
+
+
+
+
+
+ Out
+
+
+ Label
+ Q
+
+
+ Bits
+ 8
+
+
+
+
+
+ In
+
+
+ Label
+ CLK
+
+
+
+
+
+ In
+
+
+ Label
+ W
+
+
+
+
+
+ Register
+
+
+ Bits
+ 8
+
+
+
+
+
+ In
+
+
+ Label
+ O
+
+
+
+
+
+ Driver
+
+
+ Bits
+ 8
+
+
+ flipSelPos
+ true
+
+
+
+
+
+ Out
+
+
+ Label
+ D
+
+
+ Bits
+ 8
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ CLK
+ W
+ O
+ D
+ Q
+
+
\ No newline at end of file
diff --git a/Simulation/Computer Simulation.dig b/Simulation/Computer Simulation.dig
index b5d6a9f..b54cd55 100644
--- a/Simulation/Computer Simulation.dig
+++ b/Simulation/Computer Simulation.dig
@@ -4,100 +4,363 @@
- RAMSinglePortSel
+ In
- AddrBits
- 15
+ Label
+ WRITE
+
+
+
+
+ In
+
Label
- UM61256BK
+ OUTPUT
+
+
+
+
+ Out
+
Bits
8
-
+
- ROM
+ In
- AddrBits
- 16
+ Label
+ WRITE
+
+
+
+
+ In
+
- isProgramMemory
+ Label
+ WRITE
+
+
+
+
+
+ Out
+
+
+ Bits
+ 15
+
+
+
+
+
+ Button
+
+
+ Label
+ CLK
+
+
+
+
+
+ In
+
+
+ Label
+ MAR/SP
+
+
+
+
+
+ In
+
+
+ Label
+ OUTPUT
+
+
+
+
+
+ RAM.dig
+
+
+
+
+ Register.dig
+
+
+ Label
+ MAR
+
+
+
+
+
+ Register.dig
+
+
+ Label
+ SP
+
+
+
+
+
+ Driver
+
+
+ flipSelPos
true
Bits
8
-
- intFormat
- bin
-
-
+
- Ground
-
-
-
-
- Probe
-
-
- intFormat
- dec
-
-
-
-
-
- Register
+ In
Label
- Instruction Reg
+ DATA
Bits
8
-
+
- CounterPreset
-
-
+ In
+
+
+ Label
+ EN
+
+
+
+
+
+ Rectangle
+
+
+ Label
+ Manual Data Input
+
+
+ RectHeight
+ 6
+
+
+ RectWidth
+ 12
+
+
+
+
+
+ In
+
+
+ Label
+ OUTPUT
+
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+