# Computer ---------- ## Summary 1. [Aims and challenges](#aims-and-challenges) 2. [Architecture choices](#architecture-choices) 3. [Design](#design) 1. [The instruction set.](#the-instruction-set) ## Aims and challenges Make a turing complete computer from scratch. The computer will be composed of : - A CPU - Some RAM - Some ROM At first every part will be the "industrial" version : - The CPU from logic gates. - The RAM a [SRAM](https://en.wikipedia.org/wiki/Static_random-access_memory) chip (*[UM61256BK-20](/Documents/Datasheets/UM61256.pdf) from 1993*) - The ROM another chip (*[D27C010](/Documents/Datasheets/D27C010-200V10.pdf) from 1986 !*) Then the aim is to replace them with made from scratch versions. For the moment only the RAM is meant to be replaced with homemade magnetic core RAM. **NOT ANY SORTS OF AI WILL BE USED IN THIS PROJECT.** *Why ?* People in the 70s got someone on the moon with their brain, and made him come back. AI is useful for medicine, protein research or other deep research subjects. I do not need a LLM to understand and make a computer. ## Architecture choices The computer will be in 8 bits since the RAM and ROM are meant to be in 8 bits. The CPU will have ports for inputs / outputs, not a north and south bridge. ## Design The design is inspired of great people hard work : - [Ben Eater's 8 bits breadboard computer](https://eater.net/8bit) - [Mattbatwings's minecraft computer tutorial](https://youtu.be/hAZEXqWLTmY?si=qgic0b28PMeOPs_l) The core architecture will be inspired of the legendary [Intel's MCS-51](/Documents/Datasheets/8051.PDF) [microcontroller series](https://en.wikipedia.org/wiki/Intel_MCS-51). ### Core architecture ![Computer diagram.](/Documents/Computer%20diagram.svg) Made with [Drawio](https://app.diagrams.net/). ### Registers | Name | Long Name | Description | | :--: | :---------------------- | :--------------------------- | | IR | Instruction Register | Running instruction storage. | | A | A Register | ALU first input register. | | B | B Register | ALU second input register. | | MAR | Memory Address Register | RAM heap access address. | | SP | Stack pointer | RAM stack access pointer. | ### The instruction set. Every instruction is 1 to 3 bytes long. First is the opcode, and the optionnal 2 bytes are the operands. Operands can be an data (1B), address (1B), or full address (2B). These are only real instructions. Pseudoinstruction will be defined later. | Mnemonic | Description | Pseudocode | | :-------: | :------------ | :------------ | |