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• 5b4ed329cc Starting instruction set and memory map. main Ulysse Cura 2026-07-11 09:10:38 +0200
• c2446b9b2d Updated diagram. Ulysse Cura 2026-07-10 11:42:02 +0200
• 49a87423b2 Added license. Ulysse Cura 2026-07-07 01:17:31 +0200
• dddb1629a6 Original diagram. Ulysse Cura 2026-07-07 01:17:19 +0200
• 88a38a8c34 Adding Logo. Ulysse Cura 2026-07-07 01:13:45 +0200
• 2de5750a81 Adding ALU in simulation. Ulysse Cura 2026-07-07 01:10:52 +0200
• dbcb0a6ffb Pseudoinstruction swaped with instructions. Ulysse Cura 2026-07-07 01:10:37 +0200
• afc6c17648 PSW register structure. Ulysse Cura 2026-07-07 01:10:15 +0200
• f6643efaec Typo in french README. Ulysse Cura 2026-07-06 19:23:11 +0200
• 2f6d31febc Updated computer digram. Ulysse Cura 2026-07-06 18:58:06 +0200
• b6b3fbebdd Simluation for RAM and RAM related registers. Ulysse Cura 2026-07-06 18:57:51 +0200
• 00bd250808 README fr. Ulysse Cura 2026-07-06 16:39:21 +0200
• a81bd74d9c Typos. Ulysse Cura 2026-07-06 16:38:58 +0200
• 8182769e79 Starting to add PSW Register. Ulysse Cura 2026-07-06 15:13:38 +0200
• 0fb4cd8a0f Better diagram credits. Ulysse Cura 2026-07-06 15:13:17 +0200
• 98c842bed4 Refoctoring of README. Ulysse Cura 2026-07-06 15:13:01 +0200
• 8a8da3ec39 Give a name to the computer. Ulysse Cura 2026-07-06 15:12:15 +0200
• 1f6ed34154 Updated diagram. Ulysse Cura 2026-07-06 15:11:56 +0200
• 3e3a3a5de3 Removed .history folder. Ulysse Cura 2026-07-06 01:27:50 +0200
• b1a22d425e Starting architecture, schematic and simulation. Ulysse Cura 2026-07-06 01:26:41 +0200
• 783a8ae58a AI warning. Ulysse Cura 2026-07-05 16:13:16 +0200
• 85d6b4b221 Documents, summary and starting instruction set. Ulysse Cura 2026-07-05 16:03:14 +0200
• 617fcce334 First commit Ulysse Cura 2026-07-03 02:28:27 +0200