ulysse
/
Computer
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Starting to add PSW Register.

This commit is contained in:
Ulysse Cura 2026-07-06 15:13:38 +02:00
parent 0fb4cd8a0f
commit 8182769e79
1 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
README.md
View File

@ -60,9 +60,16 @@ The CPU will have ports for inputs / outputs, not a north and south bridge.
| IR | Instruction Register | Running instruction storage. |
| A | A Register | ALU first input register. |
| B | B Register | ALU second input register. |
| PSW | Program Status Word | Status flags. |
| MAR | Memory Address Register | RAM heap access address. |
| SP | Stack pointer | RAM stack access pointer. |
###### PSW Structure
| Bit | Name | Description |
| :-: | :--: | :---------- |
| 0 |
### The instruction set.
Every instruction is 1 to 3 bytes long.