3.1 KiB
Neoarcheon computer
Neoarcheon means "The new dawn of ancient times". It comes from "Neo", a prefix for "New" and "Eoarchean", the first era in which life begun.
Summary
Aims and challenges
Make a turing complete computer from scratch.
The computer will be composed of :
- A CPU
- Some RAM
- Some ROM
At first every part will be the "industrial" version :
- The CPU from logic gates.
- The RAM a SRAM chip (UM61256BK-20 from 1993)
- The ROM another chip (D27C010 from 1986 !)
Then the aim is to replace them with made from scratch versions. For the moment only the RAM is meant to be replaced with homemade magnetic core RAM.
NOT ANY SORTS OF AI WILL BE USED IN THIS PROJECT.
Why ?
People in the 70s got someone on the moon with their brain, and made him come back. AI is useful for medicine, protein research or other deep research subjects. I do not need a LLM to understand and make a computer.
Design
The design is inspired of great people hard work :
The core architecture will be inspired of the legendary Intel's MCS-51 microcontroller series.
The computer will be in 8 bits. The target frequency of the processor is 10mHz The CPU will have ports for inputs / outputs, not a north and south bridge.
Core architecture
Made with Drawio.
Registers and memory map.
| Name | Long Name | Description |
|---|---|---|
| IR | Instruction Register | Running instruction storage. |
| A | A Register | ALU first input register. |
| B | B Register | ALU second input register. |
| PSW | Program Status Word | Status flags. |
| MAR | Memory Address Register | RAM heap access address. |
| SP | Stack pointer | RAM stack access pointer. |
PSW Structure
| Bit | Name | Description |
|---|---|---|
| 0 |
The instruction set.
Every instruction is 1 to 3 bytes long. First is the opcode, and the optionnal 2 bytes are the operands. Operands can be an data (1B), address (1B), or full address (2B).
These are only real instructions. Pseudoinstruction will be defined later.
| Mnemonic | Description | Pseudocode |
|---|---|---|